Error Output Edif File
Internet Explorer 11, Safari. Thank you! Toggle navigation My Account Sign Out Sign In Language Toggle English Japanese Chinese Shopping Cart All Silicon Devices Boards and Kits Intellectual Property Support Documentation Knowledge Base Community Forums Partners Videos All Applications Products Developer Zone Support About All Silicon Devices Boards and Kits Intellectual Property Support Documentation Knowledge Base Community Forums Partners Videos All Design Tools - Others Go To Community Forums Xcell Daily Blog Technical Blog About Our Community Announcements Welcome & Join General Technical Discussion Programmable Devices UltraScale Architecture™ 7 Series FPGAs Virtex® Family FPGAs Spartan® Family FPGAs Xilinx Boards and Kits Configuration Design Tools Installation and Licensing Synthesis Simulation and Verification Implementation Design Entry Timing Analysis Vivado TCL Community HLS Design Methodologies and Advanced Tools SDAccel Design Tools - Others Embedded Systems Embedded Development Tools Embedded Processor System Design Embedded Linux Zynq All Programmable SoC SDSoC Development Environment OpenAMP Intellectual Property PCI Express Networking and Connectivity MIG DSP and Video BRAM/FIFO CommunityCategoryBoardUsers turn on suggestions Auto-suggest helps you quickly narrow down your search results by suggesting possible matches as you type. Showing results for Search instead for Do you mean Register · Sign In · Help Community Forums : Xilinx Products : Design Tools : Design Tools - Others : NGC2EDIF conversion error Reply Topic Options Subscribe to RSS Feed Mark Topic as New Mark Topic as Read Float this Topic to the Top Bookmark Subscribe Printer Friendly Page « Message Listing « Previous Topic Next Topic » NGC2EDIF conversion error aprashant Visitor Posts: 5 Registered: 03-01-2009 NGC2EDIF conversion error Options Mark as New Bookmark Subscribe Subscribe to RSS Feed Highlight Print Email to a Friend Report Inappropriate Content 08-13-2009 12:37 AM Hi..I am trying to import big design file into planAhead. It is giving error as[HD-DB 2] UpdateNetlist: New netlist is invalid.In the application data folder the planAhead.log file showed the following at the end INFO: [HD-UCFReader 1] Finished Parsing UCF File : D:\PlanAhead 10.1\RX_155_v02\RX_155_v02.data\floorplan_1\fp.ucfCommand> hdi::project startUpdate -name RX_155_v02 -file {D:\ISE_10\try21\top_rx_155.ngc}WARN: [HD-ED
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Forum Device and Tools Related Quartus II and EDA Tools Discussion Mapping EDIF file from OrCAD Capture 9.2 If this is your first visit, be sure to check out the FAQ http://www.alteraforum.com/forum/showthread.php?t=4785 by clicking the link above. You may have to register before you can post: click the register link above to proceed. To start viewing messages, select the forum that you want to visit from the selection below. Results 1 to 8 of 8 Thread: Mapping EDIF file from OrCAD Capture 9.2 Thread Tools Show Printable Version Email this Page… Subscribe to this Thread… Search Thread Advanced error output Search Display Linear Mode Switch to Hybrid Mode Switch to Threaded Mode February 24th, 2009,10:57 AM #1 deepblue View Profile View Forum Posts Altera Pupil Join Date Feb 2009 Posts 7 Rep Power 1 Mapping EDIF file from OrCAD Capture 9.2 Problem: Can't get Library Mapping funtion to work Description: Design for mixed signal ASIC captured and simulated in OrCAD 9.2. Need to emulate logic in a MAXII error output edif CPLD. EDIF 2.0.0 netlist generated from OrCAD needs to be mapped for use in Quartus II 8.1 Design Entry Tool: OrCAD 9.2 Output: EDIF 2.0.0 netlist Synthesis / Fitter: Quartus II 8.1 Design file: CNTR.EDN Type: EDIF File Design entry/synthesis tool: Custom Library Mapping File Name: sta-alt1.lmf First attempt to compile following edit of sta-alt1.lmf alway gives the warning Warning: Can't locate Library Mapping File Any following attempts to compile do not get the warning The following errors are always generated: Error: Node instance "U1" instantiates undefined entity "NA2" Error: Node instance "U2" instantiates undefined entity "I" Error: Node instance "U3" instantiates undefined entity "NA2" Error: Node instance "U4" instantiates undefined entity "NA2" This is the Library Mapping File: LIBRARY sta-alt1 % OrCAD STA Library to Altera Library Logic Mapping File % % Date: 02/19/2009 % % Rev Notes: % % 02/19/2009 - Initial build % % NAND2 % BEGIN FUNCTION nand2 (IN1,IN2) RETURNS (OUT) FUNCTION "NA2" ("A","B") RETURNS ("Z") END % INV % BEGIN FUNCTION not (IN) RETURNS (OUT) FUNCTION "I" ("A") RETURNS ("Z") END EDIF file produced from OrCAD: (edif CNTR (edifVersion 2 0 0) (edifLevel 0) (keywordMap (keywordLevel 0)) (status (written (timeStamp 2009 02 24 21
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