Error Vlib - 35 Failed To Create Directory Work

ModelSim. My quartus II project compiles successfully but either ModelSim opens and I get the following message, and another error if I try to compile my testbench: # Reading C:/altera/10.0/modelsim_ase/tcl/vsim/pref.tcl # do FIFO_With_LVDS_PARRALLEL_run_msim_rtl_vhdl.do # if {[file exists rtl_work]} { # vdel -lib rtl_work -all # } # ** Warning: (vdel-133) Unable to remove directory "U:\FTDI-Morph-IC-II_trial_With_DEMUX\simulation\modelsim\rtl_work". # The directory is not empty. # # . (GetLastError() = 145) # vlib rtl_work # ** Error: (vlib-35) Failed to create directory "rtl_work". # File exists. (errno = EEXIST) # vmap work rtl_work # Copying C:\altera\10.0\modelsim_ase\win32aloem/../modelsim.ini to modelsim.ini # Modifying modelsim.ini # ** Warning: Copied C:\altera\10.0\modelsim_ase\win32aloem/../modelsim.ini to modelsim.ini. # Updated modelsim.ini. # # vcom -93 -work work {U:/FTDI-Morph-IC-II_trial_With_DEMUX/Morph_USB_LOOPBACK.vhd} # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010 # -- Loading package standard # -- Loading package std_logic_1164 # -- Compiling entity morph_usb_loopback # ** Fatal: Unexpected signal: 11. # ** Error: U:/FTDI-Morph-IC-II_trial_With_DEMUX/Morph_USB_LOOPBACK.vhd(58): VHDL Compiler exiting # ** Error: C:/altera/10.0/modelsim_ase/win32aloem/vcom failed. # Error in macro ./FIFO_With_LVDS_PARRALLEL_run_msim_rtl_vhdl.do line 8 # C:/altera/10.0/modelsim_ase/win32aloem/vcom failed. # while executing # "vcom -93 -work work {U:/FTDI-Morph-IC-II_trial_With_DEMUX/Morph_USB_LOOPBACK.vhd}" Or I get an error which is something like POSIX EINVAL {Invalid Argument} Even when I go back to previous designs that I have simulated before modelSim still isn't opening properly.... any ideas? Cheers, Lee H mmTsuchiNovember 9th, 2010, 02:08 AMHi, 1st proposition : try to manually delete rtl_work directory. and run your macro again. 2nd proposition : Have you tried to "manually" compile your vhdl files ? I mean without macro. File>Add exisisting file to project... Menu compile>compile order>auto generate FIFO_With_LVDS_PARRALLEL_run_msim_rtl_vhdl.do is just a text file written in "limited" tcl language. You can open it with a text editor. lee.huntNovember 9th, 2010, 02:28 AMHi, 1st proposition : try to manually delete rtl_work directory. and run your macro again. Hi Tsuchi, I have already manually tried to delete the rtl_work directory and I always get the error message "Cannot remove folder rtl_work: The directory is not empty." I can't remember attempting to manually delete

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