Packet-buffer Error Detected
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Parity Error Fix
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System Returned To Rom By Processor Memory Parity Error At Pc
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Catalyst 6500 Series SwitchesTroubleshoot and AlertsTroubleshooting TechNotes Parity Errors Troubleshooting Guide Download Print Available Languages Download Options PDF (259.4 KB) View with Adobe Reader on
Imprecise Data Parity Error
a variety of devices Updated:Jul 15, 2013 Document ID:116135 Document ID: 116135 high correctable ecc error rate detected cisco Updated: Jul 15, 2013 Contributed by Shawn Wargo, Cisco Engineering. Download PDF Print Feedback Related ProductsCisco Catalyst parity error checking 6500 Series Switches ContentsIntroductionBackgroundSoft ErrorsHard ErrorsCommon Error MessagesProcessorRAMASICLatest AdvancementsProcessorRAMASICSoftwareMSFC IBC Reset6700 Series 'Single-Bit Parity Error' ResetRecommendationsSoft Errors (SEU)Environmental AuditLatest Firmware (Rommon)Thumb ScrewsHard Errors (Malfunction)Hardware (MTBF and EOL) AuditHardware DiagnosticsRelated Cisco https://supportforums.cisco.com/document/21476/sys-3-pktbufferfailerrdis-packet-buffer-failure-detected-and-sys-4 Support Community DiscussionsIntroductionThis document describes soft and hard parity errors, explains common error messages, and recommends methods that help you avoid or minimize parity errors. Recent improvements in hardware and software design reduce parity problems as well. BackgroundWhat is a processor or memory parity error?Parity checking is the storage of an extra binary digit (bit) in order to represent the parity (odd http://www.cisco.com/c/en/us/support/docs/switches/catalyst-6500-series-switches/116135-trouble-6500-parity-00.html or even) of a small amount of computer data (typically one byte) while that data is stored in memory. The parity value calculated from the stored data is then compared to the final parity value. If these two values differ, this indicates a data error, and at least one bit must have been changed due to data corruption.Within a computer system, electrical or magnetic interference from internal or external causes can cause a single bit of memory to spontaneously flip to the opposite state. This event makes the original data bits invalid and is known as a parity error.Such memory errors, if undetected, may have undetectable and inconsequential results or may cause permanent corruption of stored data or a machine crash.There are many causes of memory parity errors, which are classified as either soft parity errors or hard parity errors.Soft ErrorsMost parity errors are caused by electrostatic or magnetic-related environmental conditions.The majority of single-event errors in memory chips are caused by background radiation (such as neutrons from cosmic rays), electromagnetic interference (EMI), or electrostatic discharge (ESD). These events may randomly change the electrical sta
Post #1 of 3 (5312 views) Permalink WS-X6348-RJ45V ports failing We have a 6509 with 4 - WS-X6348-RJ45V PoE 10/100 blades, 3000W power supplies, sup 1-A's. A couple months http://www.gossamer-threads.com/lists/cisco/nsp/44677 ago we had a bank of 12 ports fail in slot 5. The switch was still under warranty from the used hardware reseller, so the blade was replaced. Thought it was a a bad refurb. Now again, a blade in slot 7 just had a bank of 12 ports fail. Just like before, the interfaces show (err-disabled). You can do a shut/no shut and it parity error will work for a minute or so, then the led indicators go orange. Cisco 7940 IP phones run off this switch. IOS Version 12.1(26)E4, RELEASE SOFTWARE (fc1). Anyone seen this before? Have we just run into a bad batch of refurbished equipment? Thanks. FastEthernet7/15 is up, line protocol is down (err-disabled) Hardware is C6k 100Mb 802.3, address is 0001.9757.a5ae (bia 0001.9757.a5ae) MTU 1500 bytes, BW 100000 packet-buffer error detected Kbit, DLY 100 usec, reliability 255/255, txload 1/255, rxload 1/255 Encapsulation ARPA, loopback not set Full-duplex, 100Mb/s input flow-control is off, output flow-control is unsupported ARP type: ARPA, ARP Timeout 04:00:00 Last input 08:45:21, output never, output hang never Last clearing of "show interface" counters never Input queue: 0/2000/0/0 (size/max/drops/flushes); Total output drops: 0 Queueing strategy: fifo Output queue: 0/40 (size/max) 5 minute input rate 0 bits/sec, 0 packets/sec 5 minute output rate 0 bits/sec, 0 packets/sec 4533321 packets input, 981795181 bytes, 0 no buffer Received 162285 broadcasts (152148 multicast) 0 runts, 0 giants, 0 throttles 0 input errors, 0 CRC, 0 frame, 0 overrun, 0 ignored 0 watchdog, 0 multicast, 0 pause input 0 input packets with dribble condition detected 36272200 packets output, 4303887531 bytes, 0 underruns 0 output errors, 0 collisions, 2 interface resets John Kienzle CONFIDENTIALITY NOTICE: This e-mail transmission, along with any attachment, is confidential, may be privileged and should be read and retained only by the intended recipient without further distribution. If you received this transmission in error, please notify the sender and delete it from your system immediately. _______________________________________________ cisco-nsp mailing list cisco-nsp [at] puck https://puck.nether.net/mailman/listinfo/cisco-nsp archive at http://puck.nether.net/pipermail/cisco-nsp/ d&