Error Library Std Not Found
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Modelsim Library Std Not Found
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Error Vhdl Compiler Exiting
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02:01 AMI'm trying to run an RTL Simulation of a project using the NativeLink http://www.alteraforum.com/forum/archive/index.php/t-32039.html set-up in Quartus II. But I end up with the following error: (in red) Reading C:/altera/11.0sp1/modelsim_ase/tcl/vsim/pref.tcl # do GrabReader_run_msim_rtl_vhdl.do # if {[file exists rtl_work]} { # vdel -lib rtl_work -all # } # vlib rtl_work # vmap work rtl_work # Copying c:\altera\11.0sp1\modelsim_ase\win32aloem/../modelsim.ini to modelsim.ini # Modifying modelsim.ini # ** Warning: Copied c:\altera\11.0sp1\modelsim_ase\win32aloem/../modelsim.ini not found to modelsim.ini. # Updated modelsim.ini. # # vcom -93 -work work {C:/qdesigns/c-cam/bb/vhdl_packages/CC_Data_Types.vhd} # Model Technology ModelSim ALTERA vcom 6.6d Compiler 2010.11 Nov 2 2010 # -- Loading package standard # -- Loading package std_logic_1164 # -- Loading package numeric_std # -- Loading package math_real # -- Loading package lpm_components # -- Compiling library std not package cc_data_types # -- Compiling package body cc_data_types # -- Loading package cc_data_types # vcom -93 -work work {C:/qdesigns/c-cam/bb/gates/regmux/regmux.vhd} # Model Technology ModelSim ALTERA vcom 6.6d Compiler 2010.11 Nov 2 2010 # -- Loading package standard # -- Loading package std_logic_1164 # -- Loading package lpm_components # ** Error: C:/qdesigns/c-cam/bb/gates/regmux/regmux.vhd(7): Library cc_data_types not found. # ** Error: C:/qdesigns/c-cam/bb/gates/regmux/regmux.vhd(8): (vcom-1136) Unknown identifier "cc_data_types". # ** Error: C:/qdesigns/c-cam/bb/gates/regmux/regmux.vhd(11): VHDL Compiler exiting # ** Error: c:/altera/11.0sp1/modelsim_ase/win32aloem/vcom failed. # Error in macro ./GrabReader_run_msim_rtl_vhdl.do line 9 # c:/altera/11.0sp1/modelsim_ase/win32aloem/vcom failed. # while executing # "vcom -93 -work work {C:/qdesigns/c-cam/bb/gates/regmux/regmux.vhd}" So Modelsim doesn't seem to find a package in a lower module, although it had no problem locating it just a bit earlier. If I run the Gate Level Simulation everything runs OK, except that I don't get a clock running. genclk : process begin Clk <= '0' ; wait for TClChClk ; Clk <= '1' ; wait for TClChClk ;