Bus Error Generated By Cpu In Trace32
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Emulation Debug Port Fail Trace32 Error
AnsweredDid anyone successfully debug an iMX6 with DCache enabled using Lauterbach debuggerQuestion asked by Frank Manig on target processor in reset trace32 Mar 3, 2015Latest reply on Mar 9, 2015 by Frank Manig Like • Show 0 Likes0 Comment • 6Hi,I try to debug some application running on iMX6 emulation running trace32 using a Lauterbach Debugger. This all works quite well, as long as the DCache is disabled. When enabled I'm getting spurious hangs of the debugger with the error message 'bus error generated by CPU' which seams to come from the debugger accessing some memory locations with the access going through the DCache.When the DCache is
Fatal Error From Podbus Driver
enabled by the running application, sometimes after a break I'm able to step some instructions before the debugger hangs, but sometimes it hangs immediately after break or even during execution.I also did some tests maually enabling the DCache via debugger with no program loaded but the ROM-code executing and had the same behaviour. Only when I list the code bypassing any caches by adding the memory class NC ('Data.List NC:r(PC)') I can successfully step through the code after DCache is enabled.But anyway that doesn't help because 1st I also want to see memory as being modified in cache and 2nd when reading the PageTable via 'MMU.List PageTable' I can't apply the NC memory class either and thus I definately get the debugger hang when DCache is enabled.Has somebody faced the same problem already and maybe a solution?RegardsNo one else has this questionMark as assumed answeredOutcomesVisibility: i.MX Community529 ViewsLast modified on Mar 3, 2015 9:45 AMTags:lauterbachContent tagged with lauterbachdcacheContent tagged with dcacheCategories: i.M
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Lauterbach Trace32 Tutorial
Go To Community Forums Xcell Daily Blog Technical Blog About Our Community Announcements Welcome & Join General Technical Discussion Programmable Devices UltraScale Architecture™ 7 Series FPGAs Virtex® Family FPGAs Spartan® Family FPGAs Xilinx https://community.nxp.com/thread/343795 Boards and Kits Configuration Design Tools Installation and Licensing Synthesis Simulation and Verification Implementation Design Entry Timing Analysis Vivado TCL Community HLS Design Methodologies and Advanced Tools SDAccel Design Tools - Others Embedded Systems Embedded Development Tools Embedded Processor System Design Embedded Linux Zynq All Programmable SoC SDSoC Development Environment OpenAMP Intellectual Property PCI Express Networking and Connectivity MIG DSP and Video BRAM/FIFO https://forums.xilinx.com/t5/Embedded-Linux/Zynq-ZC702-with-Lauterbach/td-p/258378 CommunityCategoryBoardUsers turn on suggestions Auto-suggest helps you quickly narrow down your search results by suggesting possible matches as you type. Showing results for Search instead for Do you mean Register · Sign In · Help Community Forums : Xilinx Products : Embedded Systems : Embedded Linux : Zynq (ZC702) with Lauterbach Reply Topic Options Subscribe to RSS Feed Mark Topic as New Mark Topic as Read Float this Topic to the Top Bookmark Subscribe Printer Friendly Page « Message Listing « Previous Topic Next Topic » Zynq (ZC702) with Lauterbach pniklas Adventurer Posts: 66 Registered: 05-16-2012 Zynq (ZC702) with Lauterbach Options Mark as New Bookmark Subscribe Subscribe to RSS Feed Highlight Print Email to a Friend Report Inappropriate Content 08-30-2012 04:55 AM I have a ZC702 board in front of me and wanted to flash it with A Lauterbach LA7843 JTAG Cortex A/R Debugger. I found some information here, how to set the Bootmode Pins switches. http://www.xilinx.com/support/answers/46881.htm I downloaded the most recent update for cortex controllers from the Lauterbach homepage. I received a Lauterbach CMM script which should work with the ZC702 board. I have a self-built ke
here for a quick overview of the site Help Center Detailed answers to any questions you might have Meta Discuss the workings and policies http://stackoverflow.com/questions/212466/what-is-a-bus-error of this site About Us Learn more about Stack Overflow the company Business Learn more about hiring developers or posting ads with us Stack Overflow Questions Jobs Documentation Tags Users Badges Ask Question x Dismiss Join the Stack Overflow Community Stack Overflow is a community of 4.7 million programmers, just like you, helping each other. Join them; it only takes a minute: Sign bus error up What is a bus error? up vote 155 down vote favorite 49 What does the "bus error" message mean, and how does it differ from a segfault? c unix segmentation-fault bus-error share|improve this question edited Oct 18 '15 at 10:44 Cool Guy 15.8k51952 asked Oct 17 '08 at 14:48 raldi 7,239216178 add a comment| 15 Answers 15 active oldest votes up bus error generated vote 150 down vote accepted Bus errors are rare nowadays on x86 and occur when your processor cannot even attempt the memory access requested, typically: using a processor instruction with an address that does not satisfy its alignment requirements. Segmentation faults occur when accessing memory which does not belong to your process, they are very common and are typically the result of: using a pointer to something that was deallocated. using an uninitialized hence bogus pointer. using a null pointer. overflowing a buffer. PS: To be more precise this is not manipulating the pointer itself that will cause issues, it's accessing the memory it points to (dereferencing). share|improve this answer edited Oct 17 '08 at 15:18 answered Oct 17 '08 at 15:12 bltxd 5,70322336 52 They aren't rare; I'm just at Exercise 9 from How to Learn C the Hard Way and already encountered one... –11684 Mar 26 '13 at 20:12 5 Another cause of bus errors (on Linux anyway) is when the operating system can't back a virtual page with physical memory (e.g. low-memory conditions or out of huge pages when using huge