Error Resilient System Architecture For Probabilistic Applications
Stanford University, Stanford, CA Quinn A. Jacobson Nokia Research Center, Palo Alto, CA Subhasish Mitra Stanford University, Stanford, CA 2010 Article Bibliometrics ·Downloads (6 Weeks): 1 ·Downloads (12 Months): 20 ·Downloads (cumulative): 161 ·Citation Count: 58 Published in: ·Proceeding DATE '10 Proceedings of the Conference on Design, Automation and Test in Europe Pages 1560-1565 European Design and Automation Association 3001 Leuven, Belgium, Belgium ©2010 tableofcontents ISBN: 978-3-9810801-6-2 Tools and Resources Buy this Article Recommend the ACM DLto your organization TOC Service: Email RSS Save to Binder Export Formats: BibTeX EndNote ACMRef Upcoming Conference: DATE '17 Share: | Contact Us | Switch to single page view (no tabs) **Javascript is not enabled and is required for the "tabbed view" or switch to the single page view** Powered by The ACM Digital Library is published by the Association for Computing Machinery. Copyright © 2016 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Reader QuickTime Windows Media Player Real Player Did you know the ACM DL App is now available? Did you know your Organization can subscribe to the ACM Digital Library? The ACM Guide to Computing Literature All Tags Export Formats Save to Binder
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Request full-text ERSA: Error Resilient System Architecture for Probabilistic ApplicationsConference Paper in IEEE Transactions https://www.researchgate.net/publication/221339516_ERSA_Error_Resilient_System_Architecture_for_Probabilistic_Applications on Computer-Aided Design of Integrated Circuits and Systems 31(4):1560-1565 · March 2010 with 21 ReadsDOI: 10.1109/TCAD.2011.2179038 · Source: DBLPConference: Design, Automation and Test in Europe, DATE 2010, Dresden, Germany, March 8-12, 20101st Larkhoon Leem2nd Hyungmin Cho7.35 · Stanford University+ 13rd Jason BauLast Subhasish MitraShow more authorsAbstractThere is a growing concern error resilient about the increasing vulnerability of future computing systems to errors in the underlying hardware. Traditional redundancy techniques are expensive for designing energy-efficient systems that are resilient to high error rates. We present Error Resilient System Architecture (ERSA), a low-cost robust system architecture for emerging killer probabilistic error resilient system applications such as Recognition, Mining and Synthesis (RMS) applications. While resilience of such applications to errors in low-order bits of data is well-known, execution of such applications on error-prone hardware significantly degrades output quality (due to high-order bit errors and crashes). ERSA achieves high error resilience to high-order bit errors and control errors (in addition to low-order bit errors) using a judicious combination of 3 key ideas: (1) asymmetric reliability in many-core architectures, (2) error-resilient algorithms at the core of probabilistic applications, and (3) intelligent software optimizations. Error injection experiments on a multi-core ERSA hardware prototype demonstrate that, even at very high error rates of 20,000 errors/second/core or 2x10-4 error/cycle/core (with errors injected in architecturally-visible registers), ERSA maintains 90% or better accuracy of output results, together with minimal impact on execution time, for probabilistic applications such