Ersa Error Resilient System Architecture
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Request full-text ERSA: Error Resilient System Architecture for Probabilistic ApplicationsConference Paper in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 31(4):1560-1565 · March 2010 with 22 ReadsDOI: 10.1109/TCAD.2011.2179038 · Source: DBLPConference: Design, Automation and Test in Europe, DATE 2010, Dresden, Germany, March 8-12, 20101st Larkhoon Leem2nd Hyungmin Cho7.35 · Stanford University+ 13rd Jason BauLast Subhasish MitraShow more authorsAbstractThere is a http://ieeexplore.ieee.org/iel5/43/6170951/06171059.pdf growing concern about the increasing vulnerability of future computing systems to errors in the underlying hardware. Traditional redundancy techniques are expensive for designing energy-efficient systems that are resilient to high error rates. We present Error Resilient System Architecture (ERSA), a low-cost robust system architecture for emerging https://www.researchgate.net/publication/221339516_ERSA_Error_Resilient_System_Architecture_for_Probabilistic_Applications killer probabilistic applications such as Recognition, Mining and Synthesis (RMS) applications. While resilience of such applications to errors in low-order bits of data is well-known, execution of such applications on error-prone hardware significantly degrades output quality (due to high-order bit errors and crashes). ERSA achieves high error resilience to high-order bit errors and control errors (in addition to low-order bit errors) using a judicious combination of 3 key ideas: (1) asymmetric reliability in many-core architectures, (2) error-resilient algorithms at the core of probabilistic applications, and (3) intelligent software optimizations. Error injection experiments on a multi-core ERSA hardware prototype demonstrate that, even at very high error rates of 20,000 errors/second/core or 2x10-4 error/cycle/core (with errors injected in architecturally-visible registers), ERSA maintains 90% or better accuracy of output results, together with minimal impact on execution t
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2016 Poster Sessions : ERSA: Error Resilient System Architecture for Probabilistic Applications Student Name : Hyungmin error resilient Cho Advisor : Subhasish Mitra Research Areas: Computer Systems Abstract:There is a growing concern about the increasing vulnerability of future computing systems to errors in the underlying hardware. Traditional redundancy techniques are expensive for designing energy-efficient systems that are resilient to high error rates. We present Error ersa error resilient Resilient System Architecture (ERSA), a robust system architecture which targets emerging killer applications such as recognition, mining, and synthesis (RMS) with inherent error resilience, and ensures high degrees of resilience at low cost. Using the concept of configurable reliability, ERSA may also be adapted for general-purpose applications that are less resilient to errors (but at higher costs). While resilience of RMS applications to errors in low-order bits of data is well-known, execution of such applications on error-prone hardware significantly degrades output quality (due to high-order bit errors and crashes). ERSA achieves high error resilience to high-order bit errors and control flow errors (in addition to low-order bit errors) using a judicious combination of the following key ideas: 1) asymmetric reliability in many-core architectures; 2) error resilient algorithms at the core of probabilistic applications; and 3) intelligent software