Error Unable To Halt Arm Core
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turn on suggestions Auto-suggest helps you quickly narrow down your search results by suggesting possible matches as you type. Showing results for Search instead for Do you mean Silicon Labs Community : Microcontrollers : 32-bit MCU : JTAG unable to halt core Go To Silicon Labs Community Forum Welcome and Announcements Silicon Labs Knowledge Base Microcontrollers 8-bit MCU 32-bit MCU Wireless Bluetooth / Wi-Fi Mesh Proprietary Other Products Category Optical/RH/Temp Sensor Timing Interface Other Products Hardware and Software Tools Simplicity Studio and Software Discussions General Discussions and Suggestions Chinese Forum ChineseForum Share Projects Contests Tools Software Libraries Development Kits Reference Designs Third Party Tools Training Video-Tutorials Lectures White Papers Blog http://forum.segger.com/index.php?page=Thread&threadID=56 Official Blog of Silicon Labs Chinese Blog Reply Topic Options Subscribe to RSS Feed Mark Topic as New Mark Topic as Read Float this Topic to the Top Bookmark Subscribe Printer Friendly Page « Message Listing « Previous Topic Next Topic » gmthomas Super Star Posts: 35 Registered: ‎10-13-2012 JTAG unable to halt core Options Mark as New Bookmark Subscribe Subscribe to RSS Feed Highlight Print Email to http://community.silabs.com/t5/32-bit-MCU/JTAG-unable-to-halt-core/td-p/107263 a Friend Report Inappropriate Content ‎07-08-2013 10:49 AM Our first design using EnergyMicro processor and the first prototype boards have arrived. The board powers on ok and all voltages are correct. However, when we connect a J-Link Pro via the JTAG connection, we can't communicate with the core.According to the J-Link log it has identified the Cortex M3 and is happy that there is a device there however it says it can't halt the core. This is a brand new EFM32GG390F1024 so as I understand it should have the UART/USB bootloader programmed in. AN42 says this will look for the SWDCLK line high to start the boot loader otherwise it will go to EM2. But as the JTAG has control of the reset line I would not have thought that should stop it being able to halt the core.Anyone any suggestions as to what we may be doing wrong? The JTAG connection is just a straight connection to the chip pins via a 100R resistor pack.Glyn Thomas Message 1 of 10 (13,964 Views) Everyone's Tags: ARMefm32 View All (2) Reply 0 Kudos madsw_em Ninja Employee Posts: 79 Registered: ‎08-10-2012 JTAG unable to halt core Options Mark as New Bookmark Sub
here for a quick overview of the site Help Center Detailed answers to any questions you might have Meta Discuss the workings and policies of this site About Us Learn more about Stack Overflow the company Business Learn more about hiring developers or posting ads http://stackoverflow.com/questions/3638312/cpu-is-not-halted-and-no-apb-ap-found-error with us Stack Overflow Questions Jobs Documentation Tags Users Badges Ask Question x Dismiss Join the Stack Overflow Community Stack Overflow is a community of 4.7 million programmers, just like you, helping each other. Join them; it only takes a minute: http://zhidao.baidu.com/question/155209988.html Sign up “CPU is not halted” and “No APB-AP found” error up vote 0 down vote favorite When I use JTAG to load my C code to evaluation board, it loads successfully. However, when I executed my code from main(), I error unable immediately got "CPU is not halted" error, followed by "No APB-AP found" error. I was able to load and executed the USB-related code before I got this error. I googled for it and use JTAG command "rx 0" to reset the target, but it does not make any change. I am using ARM Cortex-M3 Processor, J-Link ARM V4.14d, IAR Embedded workbench IDE. Thanks for ur help. embedded arm microcontroller cortex-m3 jtag share|improve this question edited Sep 8 '10 at 5:50 starblue 38.2k1063117 asked error unable to Sep 3 '10 at 17:56 Supernova 111 Are you sure that main() is the entry point? There is usually a fair amount of startup code that must be executed to set up memory addressing, initialize hardware, set up a stack pointer, and so forth before you can begin doing things like setting up the C runtime library, let alone actually calling main(). –RBerteig Sep 3 '10 at 21:04 IAR will execute the startup code and insert a breakpoint at main(). But I got the error when I keep going from main(). –Supernova Sep 4 '10 at 3:41 add a comment| 2 Answers 2 active oldest votes up vote 3 down vote One possibility: watchdog If your hardware has a watchdog, then you must ensure that it does not reset the CPU when the JTAG wants to halt it. If the watchdog resets the CPU you would typically get a "CPU not halted" type of error you described. If the CPU has an internal watchdog circuit, on some CPUs it is automatically "paused" when the JTAG halts the CPU. But on others, that doesn't happen, and you need to ensure the watchdog is disabled while doing JTAG debugging. If your circuit has a watchdog circuit that is external to the CPU, then typically you need to be able to disable it in some way (typically the hardware designer provides some sort of switch/jumper on the board to do so). share|improve this answer answ
ÖªµÀÈÕ±¨ ÕæÏàÎÊ´ð»ú ÖªµÀ´óÊý¾Ý ÖªµÀ¶àÊÀ½ç ÖªµÀ·ÇÒÅ Óû§ ÖªµÀÖ¥Âé ÖªµÀÖ®ÐÇ Ö¥Â齫 Ö¥ÂéÍÅ ÖªµÀÐÐ¼Ò ÈÕ±¨×÷Õß »ú¹¹ºÏ×÷ »ú¹¹ÐÐ¼Ò ¿ª·Åƽ̨ Æ·ÅƺÏ×÷ ÖªµÀ¸£Àû ²Æ¸»ÉÌ³Ç ÖªµÀ»î¶¯ ÌØÉ« ¾Ñé ÎÊ¿§ ±¦±¦ÖªµÀ Ä´Ö¸Ò½Éú ×÷Òµ°ï ÊÖ»ú°æ ÎÒµÄÖªµÀ ËÑË÷´ð°¸ °Ù¶ÈÖªµÀ >µçÄÔ/ÍøÂç >Ó²¼þ >CPU ÇëÎÊÄǸöJLINK "Unable to Halt Arm Core"µÄÎÊÌâÊÇÔõô½â¾öÄØ? ÄãºÃ, ÔÚÍøÉÏ¿´µ½ÄãµÄÌáÎÊ, ¹ØÓÚʹÓÃJLINKÎÞ·¨Í£×¡ARMµÄÎÊÌâ, ÎÒÏÖÔÚÒ²ÊÇÓиöͬÑùµÄÎÊÌâ,ÒѾÀ§ÈÅÎҺܾÃÁË,ÔÚÍøÉÏÒ²²éÁ˺ܶ෽·¨¶¼²»ÊÊÓÃ. ÇëÎÊÄúÊÇÈçºÎ½â¾öµÄÄØ< лл´Í½Ì! »òÕß·¢EMAIL¸øÎÒ (drzhf@hotmail.com) ÏÂÃæÊÇÎÒµÄÎÊÌâÏÖÏó SEGGER J-Link C... ,Íø¿´ÌáÎÊ, ¹ØÓÚʹÓÃJLINKͣסARMÎÊÌâ,ÎÒÏÖͬÎÊÌâ,ÒѾÀ§ÈÅÎÒ¾Ã,Íø²é¶¼ÊÊÓÃ. ÇëÎÊÄúºÎ½â¾öÄØ< лл´Í½Ì! »òÕß·¢EMAIL¸øÎÒ (drzhf@hotmail.com)ÃæÎÒÎÊÌâÏÖÏóSEGGER J-Link Commander V4.14b ('?' for help)Compiled May 8 2010 16:31:57DLL version V4.14b, compiled May 8 2010 16:31:37Firmware: J-Link ARM V8 compiled Dec 1 2009 11:42:48Hardware: V8.00S/N : 58001753Info: TotalIRLen = 4, IRPrint = 0x01VTarget = 2.679VInfo: Using DBGRQ to halt CPUInfo: Resetting TRST in order to halt CPUInfo: ***** Warning: CP15 access for this CPU (0 bit scan chain) not yet supportedInfo: CP15.0.0: 0x00000000: Unknown implementer code, Architecure Unknown architectureInfo: J-Link: ARM9, 0 core****** Error: Unable to halt ARM coreFound 1 JTAG device, Total IRLen = 4: #0 Id: 0x121003D3, IRLen: 04, Unknown deviceFound 1 JTAG device, Total IRLen = 4: #0 Id: 0x121003D3, IRLen: 04, Unknown deviceFound ARM with core Id 0x121003D3 (ARM9)J-Link>rx 0Reset delay: 0 msReset type NORMAL: Using RESET pin, halting CPU after ResetInfo: TotalIRLen = 4, IRPrint = 0x01Info: Failed to program ICE breaker before Reset, using default reset strategy.Info: Resetting target using RESET pinWARNING: RESET (pin 15) high, but should be low. Please check target hardware.WARNING: RESET (pin 15) high, but should be low. Please check target hardware.Info: Halting CPU coreInfo: Using DBGRQ to halt CPUInfo: Resetting TRST in order to halt CPUInfo: Resetting target using RESET pinWARNING: RESET (pin 15) high, but should be low. Please check target hardware.WARNING: RESET (pin 15) high, but should be low. Please check target hardware.Info: Halting CPU coreInfo: Using DBGRQ to halt CPUInfo: Resetting TRST in order to halt CPU****** Error: Unable to halt ARM coreJ-Link>hInfo: Using DBGRQ to halt CPUInfo: Resetting TRST in order to halt CPU****** Error: Unable to halt ARM core Õ¹¿ª drzhf9 2010-05-25 01:42 2010-06-05 22:52 ×î¼Ñ´ð°¸ There are several reasons why the CPU core can not be halted.Either the memory wait signal of the core is still enabled or CPU disables the clock (wrong PLL clock settings/CPU enters power-save mode).Therefore the core cannot communic