Page Fault Error Code 2
Contents |
Stack-Segment Fault 1.1.8 General Protection Fault 1.1.9 Page Fault 1.1.9.1 Error code 1.1.10 x87 Floating-Point Exception 1.1.11 Alignment Check 1.1.12 SIMD Floating-Point Exception 1.2 Traps 1.2.1 Debug 1.2.2 Breakpoint 1.2.3 Overflow 1.3
Exception 13 General Protection Fault
Aborts 1.3.1 Double Fault 1.3.2 Machine Check 1.3.3 Triple Fault 2 Selector Error general protection fault error code Code 2.1 Legacy 2.1.1 FPU Error Interrupt 2.1.2 Coprocessor Segment Overrun 3 See Also 3.1 External Links Exceptions as described x86 exceptions in this article are generated by the CPU when an 'error' occurs. Some exceptions are not really errors in most cases, such as page faults. Exceptions are a type of interrupt. Exceptions
Invalid Opcode Exception X64 Exception Type 06
are classified as: Faults: These can be corrected and the program may continue as if nothing happened. Traps: Traps are reported immediately after the execution of the trapping instruction. Aborts: Some severe unrecoverable error. Some exceptions will push a 32-bit "error code" on to the top of the stack, which provides additional information about the error. This value must be pulled from the stack before returning
X86 Exception Handling
control back to the currently running program. (i.e. before calling IRET) Name Vector nr. Type Mnemonic Error code? Divide-by-zero Error 0 (0x0) Fault #DE No Debug 1 (0x1) Fault/Trap #DB No Non-maskable Interrupt 2 (0x2) Interrupt - No Breakpoint 3 (0x3) Trap #BP No Overflow 4 (0x4) Trap #OF No Bound Range Exceeded 5 (0x5) Fault #BR No Invalid Opcode 6 (0x6) Fault #UD No Device Not Available 7 (0x7) Fault #NM No Double Fault 8 (0x8) Abort #DF Yes (Zero) Coprocessor Segment Overrun 9 (0x9) Fault - No Invalid TSS 10 (0xA) Fault #TS Yes Segment Not Present 11 (0xB) Fault #NP Yes Stack-Segment Fault 12 (0xC) Fault #SS Yes General Protection Fault 13 (0xD) Fault #GP Yes Page Fault 14 (0xE) Fault #PF Yes Reserved 15 (0xF) - - No x87 Floating-Point Exception 16 (0x10) Fault #MF No Alignment Check 17 (0x11) Fault #AC Yes Machine Check 18 (0x12) Abort #MC No SIMD Floating-Point Exception 19 (0x13) Fault #XM/#XF No Virtualization Exception 20 (0x14) Fault #VE No Reserved 21-29 (0x15-0x1D) - - No Security Exception 30 (0x1E) - #SX Yes Reserved 31 (0x1F) - - No Triple Fault - - - No FPU Er
and fix critical bugs. The start of a typical Oops message may look like the following:kernel BUG at kernel/signal.c:1599!Unable to handle kernel linux general protection fault NULL pointer dereference at virtual address 00000000pc = 84427f6a*pde = 00000000Oops: 0001
Osdev Page Fault
[#1]The 4 digit value after the "Oops:" message dumps out the page fault error code in hexadecimal which gpf not handled opcode from v86 in turn can help one deduce what caused the oops. The page fault error code is encoded as follows:bit 0 - 0 = no page found, 1 = protection faultbit http://wiki.osdev.org/Exceptions 1 - 0 = read access, 1 = write accessbit 2 - 0 = kernel-mode access, 1 = user mode accessbit 3 - 0 = n/a, 1 = use of reserved bit detectedbit 4 - 0 = n/a, 1 = fault was an instruction fetchSo, in the above example, the Oops error code was 0x0001 which means it was a http://smackerelofopinion.blogspot.com/2010/02/kernel-oops-page-fault-error-codes.html page protection fault, read access in kernel mode.A lot of Oops error codes are 0x0000, which means a page was not found by a read access in kernel mode.For more information, consult arch/x86/mm/fault.c at Monday, February 15, 2010 Posted by Colin Ian King Labels: debugging Reactions: Email ThisBlogThis!Share to TwitterShare to FacebookShare to Pinterest No comments: Post a Comment Newer Post Older Post Home Subscribe to: Post Comments (Atom) Links Google Plus GitHub repos My LaunchPad Page My profile at LinkedIn Twitter Homepage Kernel Team Wiki Page Blog Archive ► 2016 (12) ► August (1) ► July (1) ► June (1) ► May (1) ► April (1) ► March (1) ► February (3) ► January (3) ► 2015 (29) ► December (4) ► November (3) ► October (1) ► September (5) ► August (2) ► July (3) ► June (4) ► May (5) ► February (1) ► January (1) ► 2014 (16) ► December (3) ► November (2) ► October (1) ► July (2) ► June (2) ► May (1) ► March (3) ► February (1) ► Ja
PadLock VIA VT-310DP pipeline configurator OpenChrome for OpenSUSE IPsec-tools CryptoDev 4 Linux libfaketime.so FastCrypt driver S/MIME decoder HTML lowercaser CygProfiler suite AMD64 registers CFI for GAS NetShips ptrace() demo XFree86 support for GDB Etc. Publications and documents Linux on AMD64 VIA http://www.logix.cz/michal/doc/i386/chp09-08.htm PadLock - Wicked fast encryption VIA PadLock - Ďábelsky rychlé šifrování Jak funguje initramdisk Linux a 64 bitů Secure networking Napište si debugger AMD64 - AMD Opteron IPv6 krok za krokem I IPv6 krok za krokem II IPv6 krok za krokem III Sharp Zaurus Mosix - počítejte rychleji! I Mosix - počítejte rychleji! II Mosix - počítejte rychleji! III What's new in GDB 6.0 i386 Programmer's Manual Prev: 9.7 Error Code Next: 9.9 Exception general protection Summary 9.8 Exception Conditions The following sections describe each of the possible exception conditions in detail. Each description classifies the exception as a fault, trap, or abort. This classification provides information needed by systems programmers for restarting the procedure in which the exception occurred: Faults The CS and EIP values saved when a fault is reported point to the instruction causing the fault. Traps The CS and EIP values stored when the trap is reported general protection fault point to the instruction dynamically after the instruction causing the trap. If a trap is detected during an instruction that alters program flow, the reported values of CS and EIP reflect the alteration of program flow. For example, if a trap is detected in a JMP instruction, the CS and EIP values pushed onto the stack point to the target of the JMP, not to the instruction after the JMP. Aborts An abort is an exception that permits neither precise location of the instruction causing the exception nor restart of the program that caused the exception. Aborts are used to report severe errors, such as hardware errors and inconsistent or illegal values in system tables. 9.8.1 Interrupt 0 -- Divide Error The divide-error fault occurs during a DIV or an IDIV instruction when the divisor is zero. 9.8.2 Interrupt 1 -- Debug Exceptions The processor triggers this interrupt for any of a number of conditions; whether the exception is a fault or a trap depends on the condition: - Instruction address breakpoint fault. - Data address breakpoint trap. - General detect fault. - Single-step trap. - Task-switch breakpoint trap. The processor does not push an error code for this exception. An exception handler can examine the debug registers to determine which condition caused the exception. Refer to Chapter 12 for more detaile
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