Correctable Or Uncorrectable Memory Error
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» Articles » Monitoring Memo... Login Error Detection and Correction Jeff Layton Data protection and checking takes place various places throughout a system. Some of it is in hardware correctable memory error rate exceeded for dimm and some of it is in software. The goal is to ensure that data
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is not corrupted (changed), either coming from or going to the hardware or in the software stack. One key technology
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is ECC memory (error-correcting code memory).The standard ECC memory used in systems today can detect and correct what are called single-bit errors, and although it can detect double-bit errors, it cannot correct them.
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A simple flip of one bit in a byte can make a drastic difference in the value of the byte. For example a byte (8 bits)with a value of 156 (10011100)that is read from a file on disk suddenly acquires a value of 220 if the second bit from the left is flipped from a 0 to a 1 (11011100) for some reason.ECC memory can detect the problem uncorrectable memory error ((processor 1 memory module 3)) and correct it so with the user unaware. Notice, however, that only one bit in the byte has been changed and then corrected. If two bits change – perhaps by both the second and seventh from the left – the byte is now 11011110 (i.e., 222); typical ECC memory can detect that the “double-bit” error occurred, but it cannot correct it. In fact, when a double-bit error happens, memory should cause what is called a “machine check exception” (mce), which should cause the system to crash. After all, you are using ECC memory, so ensuring the data is correct is important; if an uncorrectable memory error occurs, you would probably want the system to stop.The source of bit-flipping usually originates in some sort of electrical or magnetic interference inside the system. This interference can cause a bit to flip at seemingly random times, depending on the circumstances. According to the Wikipedia article and a paper on single-event upsets in RAM, most single-bit flips are the result of background radiation – primarily neutrons from cosmic rays.The same Wikipedia article reports that the error rates reported from 2007 to 2009 varied all over the map, ranging from 10–10 (errors/bit-hr) to 10–17 (seve
Start here for a quick overview of the site Help Center Detailed answers to any questions you might have Meta Discuss the workings and policies corrected memory error threshold exceeded of this site About Us Learn more about Stack Overflow the company correctable memory error rate exceeded for dimm a1 Business Learn more about hiring developers or posting ads with us Server Fault Questions Tags Users Badges Unanswered Ask uncorrectable memory error (system memory, memory module 0) Question _ Server Fault is a question and answer site for system and network administrators. Join them; it only takes a minute: Sign up Here's how it works: Anybody can ask http://www.admin-magazine.com/Articles/Monitoring-Memory-Errors a question Anybody can answer The best answers are voted up and rise to the top How seriously should I take ECC correctable error warnings? up vote 7 down vote favorite I have a pile of Sun X2200-M2 servers. These servers have ECC memory. In some of these servers, I am getting warnings in the eLOM about "correctable ECC errors detected", eg: # http://serverfault.com/questions/144151/how-seriously-should-i-take-ecc-correctable-error-warnings ssh regress11 ipmitool sel elist 1 | 05/20/2010 | 14:20:27 | Memory CPU0 DIMM2 | Correctable ECC | Asserted 2 | 05/20/2010 | 14:33:47 | Memory CPU0 DIMM2 | Correctable ECC | Asserted ...some more frequently than others. The kernel on this particular system is throwing EDAC errors as well, although with far more frequency than the eLOM is recording ECC events: EDAC k8 MC0: general bus error: participating processor(local node response), time-out(no timeout) memory transaction type(generic read), mem or i/o(mem access), cache level(generic) MC0: CE page 0x42a194, offset 0x60, grain 8, syndrome 0xf654, row 4, channel 1, label "": k8_edac MC0: CE - no information available: k8_edac Error Overflow set EDAC k8 MC0: extended error code: ECC chipkill x4 error EDAC k8 MC0: general bus error: participating processor(local node response), time-out(no timeout) memory transaction type(generic read), mem or i/o(mem access), cache level(generic) MC0: CE page 0x48cb94, offset 0x10, grain 8, syndrome 0xf654, row 5, channel 1, label "": k8_edac MC0: CE - no information available: k8_edac Error Overflow set EDAC k8 MC0: extended error code: ECC chipkill x4 error Now if the server is detecting Unco
computer data storage that can detect and correct the most common kinds of internal data corruption. ECC memory is used in most computers where data corruption https://en.wikipedia.org/wiki/ECC_memory cannot be tolerated under any circumstances, such as for scientific or financial https://docs.oracle.com/cd/E19121-01/sf.x4250/820-4213-11/dimms.html computing. Typically, ECC memory maintains a memory system immune to single-bit errors: the data that is read from each word is always the same as the data that had been written to it, even if one or more bits actually stored have been flipped to the wrong state. Most non-ECC memory memory error cannot detect errors although some non-ECC memory with parity support allows detection but not correction. Contents 1 Problem background 2 Solutions 3 Implementations 4 Cache 5 Registered memory 6 Advantages and disadvantages 7 References 8 External links Problem background[edit] Electrical or magnetic interference inside a computer system can cause a single bit of dynamic random-access memory (DRAM) to spontaneously flip to the opposite correctable memory error state. It was initially thought that this was mainly due to alpha particles emitted by contaminants in chip packaging material, but research has shown that the majority of one-off soft errors in DRAM chips occur as a result of background radiation, chiefly neutrons from cosmic ray secondaries, which may change the contents of one or more memory cells or interfere with the circuitry used to read or write to them.[2] Hence, the error rates increase rapidly with rising altitude; for example, compared to the sea level, the rate of neutron flux is 3.5 times higher at 1.5km and 300 times higher at 10–12km (the cruising altitude of commercial airplanes).[3] As a result, systems operating at high altitudes require special provision for reliability. As an example, the spacecraft Cassini–Huygens, launched in 1997, contains two identical flight recorders, each with 2.5gigabits of memory in the form of arrays of commercial DRAM chips. Thanks to built-in EDAC functionality, spacecraft's engineering telemetry reports the number of (correctable) single-bit-per-word errors and (uncorrectable) double-bit-per-word errors. During the first 2.5years of flight, the spacecraft reported a nearly constant single-bit error rate of about 280
following sections: DIMM Replacement Guidelines How DIMM Errors Are Handled by the System Isolating and Correcting DIMM ECC Errors Note - Refer to the service manual or service label for the system that you are servicing for information on DIMM population rules. DIMM Replacement Guidelines Replace a DIMM when one of the following events takes place: The DIMM fails memory testing under BIOS due to Uncorrectable Memory Errors (UCEs). UCEs occur and investigation shows that the errors originated from memory. More than 24 Correctable Errors (CEs) originate in 24 hours from a single DIMM and no other DIMM is showing further CEs. Note - If more than one DIMM has experienced multiple CEs, other possible causes of CEs must be ruled out by a qualified Sun Support specialist before replacing any DIMMs. Retain copies of the logs showing the memory errors to send to Sun for verification prior to calling Sun. How DIMM Errors Are Handled by the System This section describes the following topics: Uncorrectable DIMM Errors Correctable DIMM Errors DIMM Fault LEDs Uncorrectable DIMM Errors For all operating systems, the behavior is the same for uncorrectable errors (UCEs): 1. When a UCE occurs, the memory controller causes an immediate reboot of the system. 2. During reboot, the BIOS checks the Machine Check registers and determines that the previous reboot was due to a UCE. The uncorrectable ECC error is displayed in the service processor’s system event log (SEL) as shown here: Memory | Uncorrectable ECC | Asserted | DIMM A0 Correctable DIMM Errors If a DIMM has 24 or more correctable errors (CE)s in 24 hours, it is considered defective and should be replaced. CEs will be captured in the SEL and light the fault LED after 24 single bit errors are detected in 24 hours. They are reported or handled in the supported operating systems as follows: Windows server: a. A Machine Check error-message bubble appears on the task bar. b. Open the Event Viewer to view errors. Access the Event Viewer through this menu path: Start-->Administration Tools-->Event Viewer c. View individual errors (by time) to see the details of the error. Solaris: Solaris FMA reports and sometimes retires memory with correctable Error Correction Code (ECC) errors. See your Solaris documentation for details. To view ECC errors, use the following command: fmdump -eV DIMM Fault LEDs When you press the Remind button on the motherboard (or memory tray for x4450), the LEDs next to the DIMMs flash to indicate that the system has detected 24 or more CEs in a 24-hour period on that DIMM. DIMM fa