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in here. The browser version you are using is not recommended for this fault in slot "all pci error" on system site.Please consider upgrading to the latest version of your browser by a uncorrectable bus error has occurred on system clicking one of the following links. Safari Chrome IE Firefox Support Navigation Support Support Home Drivers sensor planar fault has transitioned to critical from a less severe state and Software Product Specifications Warranty Warranty Center Track Warranty Status Submit a Warranty Request Support Community Contact Us Support by Product Boards and Kits Education Emerging Technologies

A Software Nmi Has Occurred On System

Graphics Drivers Network and I/O Processors Server Products Services Software Solid State Drives Technologies Wireless Networking Other Intel Products Identify My Product Support Support Home Intel® Boards and Kits Critical Interrupt/PCIe* Link, Bus Uncorrectable Error for Boards and Kits Last Reviewed: 02-Mar-2016 Article ID: 000007530 If you are using any add-in RAID card, you may no op rom space see the error in your System Event Log (SEL), possibly accompanied by System Firmware Error (POST Error). POST Code: A5A4 To resolve this issue, clear the SEL, then perform a CMOS Clear CMOS Clear Procedure: Power down the server; do not remove AC power. Open the server and move the jumper from the default operating position (pins1-2) to the “clear” position (pins 2-3). Wait 5 seconds. Move the jumper back to the default position (pins 1-2). Close the server system and power up the server. CMOS is now cleared and can be reset by going into the BIOS setup.

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at the User's Guide for Integrated Management Module. Note: Deassertive events not listed in ibm support this table are informational only. IMM Events that automatically

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notify Support You can configure the Integrated Management Module II (IMM2) to automatically notify

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Support (also known as call home) if certain types of errors are encountered. If you have configured this function, see the table for http://www.intel.com/content/www/us/en/support/boards-and-kits/000007530.html a list of events that automatically notify Support. 40000001-00000000 Management Controller [arg1] Network Initialization Complete. 40000002-00000000 Certificate Authority [arg1] has detected a [arg2] Certificate Error. 40000003-00000000 Ethernet Data Rate modified from [arg1] to [arg2] by user [arg3]. 40000004-00000000 Ethernet Duplex setting modified from [arg1] to [arg2] by http://publib.boulder.ibm.com/infocenter/systemx/documentation/topic/com.ibm.sysx.7944.doc/r_imm_error_messages.html user [arg3]. 40000005-00000000 Ethernet MTU setting modified from [arg1] to [arg2] by user [arg3]. 40000006-00000000 Ethernet locally administered MAC address modified from [arg1] to [arg2] by user [arg3]. 40000007-00000000 Ethernet interface [arg1] by user [arg2]. 40000008-00000000 Hostname set to [arg1] by user [arg2]. 40000009-00000000 IP address of network interface modified from [arg1] to [arg2] by user [arg3]. 4000000a-00000000 IP subnet mask of network interface modified from [arg1] to [arg2] by user [arg3]. 4000000b-00000000 IP address of default gateway modified from [arg1] to [arg2] by user [arg3]. 4000000c-00000000 OS Watchdog response [arg1] by [arg2] . 4000000d-00000000 DHCP[[arg1]] failure, no IP address assigned. 4000000e-00000000 Remote Login Successful. Login ID: [arg1] from [arg2] at IP address [arg3]. 4000000f-00000000 Attempting to [arg1] server [arg2] by user [arg3]. 40000010-00000000 Security: Userid: [arg1] had [arg2] login failures from WEB client at IP address [arg3]. 400000

X4600 server, and to the Sun Fire X4600 M2 server, unless otherwise noted in the text. This appendix contains the following sections: Handling of Uncorrectable Errors Handling of Correctable Errors Handling of Parity Errors (PERR) Handling of System Errors https://docs.oracle.com/cd/E19121-01/sf.x4600/819-4343-12/appe-error_handling.html (SERR) Handling Mismatching Processors Hardware Error Handling Summary Handling of Uncorrectable Errors This section lists facts and considerations about how the server handles uncorrectable errors. Note - The BIOS ChipKill feature must be disabled if you are testing for failures of multiple bits within a DRAM (ChipKill corrects for the failure of a four-bit wide DRAM). The BIOS logs the error to the SP system event log (SEL) through the board management controller (BMC). The SP's SEL is updated with on system the failing DIMM pair's particular bank address. The system reboots. The BIOS logs the error in DMI. Note - If the error is on low 1MB, the BIOS freezes after rebooting. Therefore, no DMI log is recorded. An example of the error reported by the SEL through IPMI 2.0 is as follows: When low memory is erroneous, the BIOS is frozen on pre-boot low memory test because the BIOS cannot decompress itself into faulty DRAM and execute the following items: ipmitool> has occurred on sel list 100 | 08/26/2005 | 11:36:09 | OEM #0xfb | 200 | 08/26/2005 | 11:36:12 | System Firmware Error | No usable system memory 300 | 08/26/2005 | 11:36:12 | Memory | Memory Device Disabled | CPU 0 DIMM 0 When the faulty DIMM is beyond the BIOS's low 1MB extraction space, proper boot happens: ipmitool> sel list 100 | 08/26/2005 | 05:04:04 | OEM #0xfb | 200 | 08/26/2005 | 05:04:09 | Memory | Memory Device Disabled | CPU 0 DIMM 0 Note the following considerations for this revision: Uncorrectable ECC Memory Error is not reported. Multi-bit ECC errors are reported as Memory Device Disabled. On first reboot, BIOS logs a HyperTransport Error in the DMI log. The BIOS disables the DIMM. The BIOS sends the SEL records to the BMC. The BIOS reboots again. The BIOS skips the faulty DIMM on the next POST memory test. The BIOS reports available memory, excluding the faulty DIMM pair. FIGURE E-1 shows an example of a DMI log screen from BIOS Setup Page. FIGURE E-1 DMI Log Screen, Uncorrectable Error Handling of Correctable Errors This section lists facts and considerations about how the server handles correctable errors. During BIOS POST: The BIOS polls the MCK registers. The BIOS logs to DMI. The BIOS logs to the SP SEL through the BMC. The feature is turned off at OS boot time by default. The following Linux versions report correctable ECC syndrome and

 

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