Modelsim Pe Error Loading Design
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List Topic List New Topic Search Register User List Log In Error loading design (Modelsim student version) Author: Keltuzad (Guest) Posted on: 2009-10-09 18:08 Rate this post
Error Loading Design Questasim
0 ▲ useful ▼ not useful Hi @ all, Im working with the error loading design modelsim verilog student version of Modelsim, I have dowloaded the latest version (6.5b) and the licence and copied it to the
Modelsim Student License
root folder(C:\dev\Modeltech_pe_edu_6.5b). Now to the problem: Im using "vsim -voptargs=+acc work.tdm_bert_tb" as my run command. My only error report is: #Error loading design Due to the limited content of the error msg the design unit was not found I have difficulties finding a solution. What have I already done: I have reinstalled Modelsim + licence with Administrator rights, tried running it with different -commands e.g. vsim -optargs work.tdm_bert_tb, vsim work.tdm_bert_tb (none). I only recieve the above mentoinened error. Any suggestions are welcome. Thanks in advance. Kel. 2009-10-12 14:45: Moved by Admin Report post Edit Move Thread sperren Delete topic Thread mit error (vsim-3170) could not find anderem zusammenführen Quote selected text Reply Reply with quote Re: Error loading design (Modelsim student version) Author: guest (Guest) Posted on: 2009-10-09 19:53 Rate this post 0 ▲ useful ▼ not useful did you compile your designfiles/tb into the work lib using vlib and vcom? Report post Edit Delete Quote selected text Reply Reply with quote Re: Error loading design (Modelsim student version) Author: Kel (Guest) Posted on: 2009-10-10 13:40 Rate this post 0 ▲ useful ▼ not useful hi, yes all files including the testbench are compiled. Report post Edit Delete Quote selected text Reply Reply with quote Re: Error loading design (Modelsim student version) Author: Christian R. (supachris) Posted on: 2009-10-10 14:31 Rate this post 0 ▲ useful ▼ not useful In the most cases the error is shown many lines obove the "Error loading design" Message. Search the blue lines for "Fatal : ..." or so. Report post Edit Delete Quote selected text Reply Reply with quote Re: Error loading design (Modelsim student version) Author: Kel (Guest) Posted on: 2009-10-12 12:43 Rate this post 0 ▲ useful ▼ not useful Hi supachris, thx for the hin
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Modelsim Design Unit Was Not Found
Stack Overflow is a community of 6.2 million programmers, just like you, helping each other. Join them; it only takes a minute: Sign up Error loading design modelsim PE student edition 10.4 up vote http://embdev.net/topic/error-loading-design-modelsim-student-version 1 down vote favorite I'm creating a new project which i called alpha,then i create a new file test.vhd. library ieee; use ieee.std_logic_1164.all; entity d_latch is port( data_in:in std_logic; data_out:out std_logic; enable:in std_logic); end d_latch; architecture beh of d_latch is begin process(data_in,enable) begin if(enable <= '1') then data_out <= data_in; end if; end process; end beh; I add test.vhd to the project alpha then i compile the file.After http://stackoverflow.com/questions/28357845/error-loading-design-modelsim-pe-student-edition-10-4 that i simulate->start simulate then i check [+] work library then the module presented in it,but an error's message appears Error loading design vhdl modelsim share|improve this question asked Feb 6 '15 at 2:57 hmidi slim 612 1 You better create a testbench (so with an empty entity) where you add your d_latch component into it. Compile that testbench and then run it. –vermaete Feb 6 '15 at 7:43 add a comment| 2 Answers 2 active oldest votes up vote 1 down vote First edit the if statement to get the correct results : if(enable <= '1') must be if(enable = '1') I simulated your code and no errors found. Simulation results was correct. Just open modelsim software, click file and change directory (for example to the address of test.vhd file) Then compile test.vhd and simulate it. Sometimes you should close modelsim and do the same stages again, because the library directory may be changed wrongly by yourself. share|improve this answer edited Feb 11 '15 at 7:50 answered Feb 6 '15 at 18:32 Amir 38028 You misspelled 'enable' in the second instance in your answer. –user1155120 Feb 11 '15 at 3:26 Thanks, I edited my answer. &ndas
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